hwtBuildsystem.quartus package

Subpackages

• hwtBuildsystem.quartus.api package
  • Submodules
  • hwtBuildsystem.quartus.api.project module
    • QuartusProject
      • QuartusProject.SUFFIX_TO_FILE_TYPE
      • QuartusProject.addConstrainFiles()
      • QuartusProject.addFiles()
      • QuartusProject.close()
      • QuartusProject.create()
      • QuartusProject.implemAll()
      • QuartusProject.setPart()
      • QuartusProject.setTop()
      • QuartusProject.synthAll()
      • QuartusProject.writeBitstream()
  • hwtBuildsystem.quartus.api.tcl module
    • QuartusProjectTCL
• hwtBuildsystem.quartus.logParser package
  • Submodules
  • hwtBuildsystem.quartus.logParser.synthesis module
    • QuartusSynthesisLogParser
      • QuartusSynthesisLogParser.RE_TABLE_HEADER_LINE
      • QuartusSynthesisLogParser.RE_TABLE_NAME_LINE
      • QuartusSynthesisLogParser.getBasicResourceReport()
      • QuartusSynthesisLogParser.parse()

Submodules

hwtBuildsystem.quartus.config module

class hwtBuildsystem.quartus.config.QuartusConfig

Bases: object

HOME = None

classmethod getExec()

classmethod getHome()

hwtBuildsystem.quartus.executor module

hwtBuildsystem.quartus.part module

class hwtBuildsystem.quartus.part.IntelPart(family: str, device: str)

Bases: object

Intel/Altera FPGA model name specification

as_tuple()

hwtBuildsystem.quartus.report module

class hwtBuildsystem.quartus.report.QuartusReport(projectRoot: str, projectName: str, topName: str)

Bases: object

This class is output from hardware synthesis made by Intel Quartus

parseUtilizationSynth()

setBitstreamFileName()

setImplFileNames()

setSynthFileNames()